Thin film transistors (TFT's) are becoming popular in the effort to reduce the cell size of various semiconductor devices, thereby conserving valuable space on the semiconductor chip surface. The use of TFT's is generally described, for example, in U.S. Pat. No. 5,156,987 of Sandhu et al., and U.S. Pat. No. 5,278,459 of Matsui et al.
As one example, TFT's are finding use as elements of static random access memory cells (SRAM's), which are very common and important devices in microelectronic structures. Because of the ever-increasing number of features intended for the dimension of a typical silicon chip surface, SRAM's are being utilized in arrays of steadily-increasing density. The miniaturization of these features eventually reaches the boundaries of lithographic capabilities.
However, potential problems can arise when trying to incorporate TFT's into existing chip fabrication technology. The steps needed to form the TFT can interfere with existing front-end-of-the-line (FEOL) and back-end-back-of-the-back-line (BEOL) processes for preparing integrated circuit structures. As an example, fabrication of TFT's often involves high temperature steps, e.g., annealing at temperatures of 800.degree. C. or higher. Temperatures of that level could damage the features prepared in FEOL or BEOL processes.
Furthermore, the addition of the TFT to existing products having pre-designed configurations can be extremely difficult, if not impossible. Any modifications needed in the "host" device to accommodate the TFT can be costly and time-consuming.
It's thus apparent that a need still exists for a method of increasing the density of features within a semiconductor device, without adversely affecting any of the features already formed in the device, such as field effect transistors (FE's). Moreover, the actual incorporation of the TFT into the host structure (for example, an SRAM) should not involve complicated steps which decrease manufacturing productivity and increase overall costs. Finally, the overall performance of the device should be maintained or increased with the addition of the TFT, in terms of processing speed and on/off current ratios, for example.